1. Field of Invention
Embodiments of the present invention relate generally to semiconductor memory devices and more particularly to a method of fabricating a nonvolatile memory device.
2. Discussion of the Related Art
Nonvolatile memory devices such as floating-gate flash memory devices can maintain data in the absence of any applied power. A unit cell of a floating-gate flash memory device must have a relatively thick tunnel oxide film to store charges (i.e., free electrons) in the floating gate. However, as the thickness of the tunnel oxide film increases, the operation voltage of the floating-gate flash memory device also increases. To solve this problem, a floating-gate flash memory device including a tunnel oxide film formed of a silicon-oxide-nitride-oxide-silicon (SONOS) layer has been proposed. A unit cell of such a SONOS memory device has a relatively thin tunnel oxide film because charges are stored in deeply potentialized traps isolated from each other. Thus, an operation voltage of the SONOS memory device is typically lower than that of a conventional floating-gate flash memory device. Well-known features of typical SONOS memory devices will be described in greater detail below.
FIG. 1 is a sectional view of a conventional SONOS memory cell.
As shown in FIG. 1, a conventional SONOS memory cell includes a tunnel oxide film 2, a silicon nitride film 3, a blocking oxide film 4, and a gate electrode 5 sequentially stacked on a semiconductor substrate 1 such that a multi-layer film including films of 2, 3 and 4 is interposed between the gate electrode 5 and the semiconductor substrate 1. Source/drain regions 6 are formed in the semiconductor substrate 1 at both sides of the gate electrode 5. The silicon nitride film 3 includes traps in deep energy potential. When a program voltage is applied to the gate electrode 5, charges tunnel through the tunnel oxide film 2 from a channel region and are then stored in traps of the silicon nitride film 3. When an erasing voltage is applied to the gate electrode 5, charges are released from the traps and pass through the tunnel oxide film 2 to be discharged into the channel region. In the SONOS memory cell, a first threshold voltage, corresponding to a state with charges stored in the traps, is different from a second threshold voltage, corresponding to a state without charges stored at the traps. Utilizing such a difference in threshold voltages, it is possible to detect that data stored in the SONOS memory cell is logically ‘1’ or ‘0’.
The multi-layer film 2, 3 and 4 can include one or more defects 7 for various reasons. For example, the defect 7 may be formed while carrying out any of several steps for fabricating the SONOS memory device. The defect 7 may be a metallic impurity or another particle. The defect 7 may be an empty space having an amount of electric charges. Generally, the presence of such a defect 7 induces convergence of an electric field 8 within the multi-layer film 2, 3 and 4. Thus, when the gate electrode 5 is supplied with a program, erasing, or sensing voltage, an electric field 8 generated from the gate electrode 5 converges toward the defect 7 and can causes numerous problems during operation of the memory cell. For example, when a program or erasing voltage having a relatively high voltage level is applied to the gate electrode 5, the electric field 8 generated by the gate electrode 5 concentrates around the defect 7 and can damage portions of films 2, 3 and 4 adjacent thereto. Moreover, during a sensing operation for read data, charges may be stored in traps around the defect 7. The problems described above can deteriorate physical characteristics of the SONOS memory device.